I have plenty of hours flying planes (unlicensed - while doing aerial work and playing around to kill time thanks to my instructor pilot), and have a limited amount of experience skydiving.
One thing in these comments I haven't seen said: F*K that plane. Off runway landing has significant risk. Parachute is so close to 0.0 risk that you do it just for fun on a day off. I wouldn't do an off runway landing just for fun on my day off.
The thing is staged, no question. The guy knows he messed up and will pay for it. But if I had to decide between my life and protecting a bunch of metal tubes and (fabric | aluminium, not sure), I know what I would do.
Now every ship has a 1B potential liability when transiting.
What a great way for Egypt to turn what was a near-disaster into a full disaster. They didn't lose out that much, everyone is playing happy families. Then they do this. Fail on so many levels. Well done Egypt in screwing over your golden goose.
I got a visit when I was young (planned, agreed to in advance) from an officer from my countries national intelligence service. I was a reference for someone going to work for the equivalent of the NSA.
He spent a lot of time looking at my mum's (questionable) books and making notes.
I've thought about that a lot over the last 20 years. How much insight you can gain from someones bookshelf.
I'm now addicted to it, where ever I go. Feels rude and invasive though, so I try not to be too obvious
Yes, that's the other thing. If the bookshelf didn't have doors you'd only see 100% of my wife's books behind me with a cam on, my bookshelf is next to the desk...
This is hilarious, and clearly a joke, but it does make one think. I've always thought that it would be nice to have variables which you don't name, which only live over a couple of lines, where it's clear the variable is just for some plumbing and doesn't need a name. I wonder if there is actually something in these two concepts combined
> I've always thought that it would be nice to have variables which you don't name, which only live over a couple of lines, where it's clear the variable is just for some plumbing and doesn't need a name
There are several things that involve unnamed, shortlived plumbing vars; as well as various languages pipeline notations, therr is also this in scala lambdas:
Since R lets you define your own operators, they took '%>%' and defined it as "pipe the return value from one function as the first argument to another function," so you can do this:
Mentioned in another sub-comment, but Clojure's threading macros do this. They do it by making positional assumptions about the implicit argument: https://clojure.org/guides/threading_macros
The initial diagnosis was crap. Add in some surgery and the diagnosis improved dramatically, different type. As far as a cancer diagnosis goes I got off really well in the end.
It was the initial stage where I felt I had a death sentence that shifted my outlook on life. When you think you're going to die you re-evaluate some things. I looked at my life, thought about what I'd regret, and made 5 year plans to get things on track. I'm now in the habit of setting plans for 5 years to ensure I don't regret the life I do have.
Why don't we have two sets of memory - the main, slow, cached memory, and a smaller set of super fast low latency memory, like cache, but that the programmer and compiler can use explicitly?
Sort of like special purpose performance instructions like SIMD but on the memory side
Special instructions won't help latency. There are prefetch instructions that basically just do loads. Each load in x64 (at least on Intel) grabs 128 bytes (two cache lines) from memory to cache minimum.
The Cell from Sony did have explicit cache control (I think) and it was notoriously difficult to program for.
The real reason cache isn't handled explicitly though is because it isn't necessary. Getting good performance and cache usage can be done at the C++ level, you just have to know how the CPU works and access memory linearly so it can be prefetched. I've tried to use prefetch instructions and beating the out of order buffer in the CPU is actually very difficult.
It's a common misconception that cache is "low latency". It certainly is compared to main memory (which can take ~200 cycles before it stats feeding the CPU the bytes it wanted), but L3 hit can take 40-60 cycles easily as well, so it's not even an order of magnitude difference. By the time you're hitting L3, you're kind of already screwed.
For perf, I'd much rather have larger L1, or a (much) bigger register file.
One thing in these comments I haven't seen said: F*K that plane. Off runway landing has significant risk. Parachute is so close to 0.0 risk that you do it just for fun on a day off. I wouldn't do an off runway landing just for fun on my day off.
The thing is staged, no question. The guy knows he messed up and will pay for it. But if I had to decide between my life and protecting a bunch of metal tubes and (fabric | aluminium, not sure), I know what I would do.