I just skimmed over this, toolchain setup talks about TivaTi/Stellaris, code is ... | Hacker News

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		friendzis on Feb 22, 2018 \| parent \| context \| favorite \| on: Programming ARM μC in Rust at four different level... I just skimmed over this, toolchain setup talks about TivaTi/Stellaris, code is for STM32F. My memory is muddy on this, so take it with a bit of salt. Cores have specific "interrupt context" (do not recall the actual name) with a specific set of call[er]-saved registers (EABI). Making fault handlers `extern C` is a way to ensure that these functions adhere to that EABI and do not clobber processor state. Probably.

TickleSteve on Feb 22, 2018 [–]

There is an interrupt-mode stack and a user-mode stack, the stacks are switched on interrupt invocation.

The value pushed on to the stack is a special value that causes a pop into SP to switch stacks back on return.

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