It will be interesting to see how this holds up longer term. I read a great paper from ISSC on making chips thin enough for stacking and their conclusion was that it takes very little silicon to build most chips. Thin enough that stacking old 130nm dies to get 22nm transistor density in the same thickness using a stack of 6 130nm 'sheets'. Heat is still an issue of course as is alignment (if you heat one sliver before the others heat up it can push itself out of alignment apparently)
That said, I'd expect this to become the memory for laptops in the not to distant future. A Core i7 with 16GB of DDR5 stacked on top of the CPU and all that freed up space for more battery. Look for it in a Macbook near you :-)
I'd of thought the central connecting holes that are used to link the wafers together as a bus also act as heatsink to blance heat across the stack.
Also with the lower speeds used, heat will be less and may be the limit currently to avoid warping of individual wafers in the stack.
As for desktops etc, one avenue this does open up would be a more standard socket perhaps as the CPU can change and sits on another socket in effect, allowing changes to be done at that level to maybe stretch out sockets some CPU's would normally never reach.
That said, I'd expect this to become the memory for laptops in the not to distant future. A Core i7 with 16GB of DDR5 stacked on top of the CPU and all that freed up space for more battery. Look for it in a Macbook near you :-)